| 126 |
#define ATPIC(io, base, eoi, imenptr) \ |
#define ATPIC(io, base, eoi, imenptr) \ |
| 127 |
{ { atpic_enable_source, atpic_disable_source, (eoi), \ |
{ { atpic_enable_source, atpic_disable_source, (eoi), \ |
| 128 |
atpic_enable_intr, atpic_vector, atpic_source_pending, NULL, \ |
atpic_enable_intr, atpic_vector, atpic_source_pending, NULL, \ |
| 129 |
atpic_resume, atpic_config_intr }, (io), (base), \ |
atpic_resume, atpic_config_intr, atpic_assign_cpu }, (io), \ |
| 130 |
IDT_IO_INTS + (base), (imenptr) } |
(base), IDT_IO_INTS + (base), (imenptr) } |
| 131 |
|
|
| 132 |
#define INTSRC(irq) \ |
#define INTSRC(irq) \ |
| 133 |
{ { &atpics[(irq) / 8].at_pic }, IDTVEC(atpic_intr ## irq ), \ |
{ { &atpics[(irq) / 8].at_pic }, IDTVEC(atpic_intr ## irq ), \ |
| 160 |
static int atpic_source_pending(struct intsrc *isrc); |
static int atpic_source_pending(struct intsrc *isrc); |
| 161 |
static int atpic_config_intr(struct intsrc *isrc, enum intr_trigger trig, |
static int atpic_config_intr(struct intsrc *isrc, enum intr_trigger trig, |
| 162 |
enum intr_polarity pol); |
enum intr_polarity pol); |
| 163 |
|
static void atpic_assign_cpu(struct intsrc *isrc, u_int apic_id); |
| 164 |
static void i8259_init(struct atpic *pic, int slave); |
static void i8259_init(struct atpic *pic, int slave); |
| 165 |
|
|
| 166 |
static struct atpic atpics[] = { |
static struct atpic atpics[] = { |
| 386 |
} |
} |
| 387 |
|
|
| 388 |
static void |
static void |
| 389 |
|
atpic_assign_cpu(struct intsrc *isrc, u_int apic_id) |
| 390 |
|
{ |
| 391 |
|
|
| 392 |
|
/* |
| 393 |
|
* 8259A's are only used in UP in which case all interrupts always |
| 394 |
|
* go to the sole CPU and this function shouldn't even be called. |
| 395 |
|
*/ |
| 396 |
|
panic("%s: bad cookie", __func__); |
| 397 |
|
} |
| 398 |
|
|
| 399 |
|
static void |
| 400 |
i8259_init(struct atpic *pic, int slave) |
i8259_init(struct atpic *pic, int slave) |
| 401 |
{ |
{ |
| 402 |
int imr_addr; |
int imr_addr; |